In a highly integrated semiconductor device, a buried channel array transistor (BCAT) including a buried gate structure in a gate trench of a substrate may be formed. In BCATs including a buried gate structure, a channel length may decrease causing on-state currents. In order to reduce the channel length, depths of the source/drain regions are increased and, thus a resistance of each of source/drain regions, i.e., a spreading resistance, may also be increased. Therefore, a high-performance transistor having a reduced spreading resistance is desired.